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november 2012 ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 fan48630 ? 2.5mhz, 1500ma synchronous tiny boost? regulator with bypass mode fan48630 ? 2.5 mhz, 1500 ma, synchronous tinyboost ? regulator with bypass mode features ? few external components: 0.47 h inductor and 0603 case size input and output capacitors ? input voltage range: 2.35 v to 5.5 v ? fixed output voltage options: 3.0 v to 5.0 v ? maximum continuous load current: 1500 ma at v in of 2.6 v boosting v out to 3.5 v ? up to 96% efficient ? true bypass operation when v in > target v out ? internal synchronous rectifier ? soft-start with true load disconnect ? forced bypass mode ? v sel control to optimize target v out ? short-circuit protection ? low operating quiescent current ? 16-bump, 0.4 mm pitch wlcsp applications ? boost for low-voltage li-ion batteries, brownout prevention, boosted audio, usb otg, and lte / 3g rf power ? cell phones, smart phones, portable instruments description the fan48630 allows systems to take advantage of new battery chemistries that can supply significant energy when the battery voltage is lower than the required voltage for system power ics. by combinin g built-in power transistors, synchronous rectification, and low supply current; this ic provides a compact solution for systems using advanced li-ion battery chemistries. the fan48630 is a boost regulator designed to provide a minimum output voltage (v out(min) ) from a single-cell li-ion battery, even when the battery voltage is below system minimum. output voltage regulation is guaranteed to a maximum load current of 1500 ma. quiescent current in shutdown mode is less than 3 a, which maximizes battery life. the regulator transitions smoothly between bypass and normal boost mode. the device can be forced into bypass mode to reduce quiescent current. the fan48630 is available in a 16-bump, 0.4 mm pitch, wafer-level chip-scale package (wlcsp). l1 figure 1. typical application ordering information part number output voltage (1) v sel0 / v sel1 soft- start forced bypass operating temperature package (2) packing fan48630uc315x 3.15 / 3.33 fast low i q -40c to 85c 16-ball, 4x4 array, 0.4 mm pitch, 250 m ball, wafer-level chip- scale package (wlcsp) tape and reel fan48630uc33x 3.30 / 3.49 fast low i q FAN48630UC35X 3.50 / 3.70 fast low i q fan48630uc37ax 3.70 / 3.77 fast low i q fan48630uc45x 4.50 / 4.76 slow ocp on fan48630uc50x 5.00 / 5.29 slow ocp on notes: 1. other output voltages ar e available on request. please contact a fa irchild semiconductor representative. 2. includes backside laminate.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 2 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode block diagram en l1 q2 vin sw c in gnd q1 q1b q1a pg c out q3 q3b q3a vsel byp bypass control modulator logic and control vout synchronous rectifier control figure 2. block diagram table 1. recommended components component description vendor parameter typ. unit l1 0.47 h, 30% toko: dfe201612c dfr201612c cyntec: pife20161b l 0.47 h dcr (series r) 40 m ? c in 4.7 f, 10%, 6.3 v, x5r, 0603 murata: grm188r60j475k tdk: c1608x5r0j475k c 4.7 f c out 2 x 10 f, 20%, 10 v, x5r, 0603 tdk: c1608x5r1a106m c 20 f
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 3 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode pin configuration agnd vin vsel pg agnd pgnd sw vout en b1 b2 c2 a1 a2 b3 a3 c3 d1 d2 d3 c1 a4 b4 c4 d4 byp figure 3. top through view (bumps down ) figure 4. bottom view (bumps up) pin definitions pin # name description a1 en enable . when this pin is high, the circuit is enabled. a2 pg power good . this is an open-drain output. pg is acti vely pulled low if output falls out of regulation due to overload or if thermal protection threshold is exceeded. a3?a4 vin input voltage . connect to li-ion battery input power source. b1 vsel output voltage select . when boost is running, this pin ca n be used to select output voltage. b2, c2 d1 agnd analog ground . this is the signal ground reference for the ic. all voltage levels are measured with respect to this pin. b3?b4 vout output voltage . place c out as close as possible to the device. c1 byp bypass . this pin can be used to activate forced bypass mode. when this pin is low, the bypass switches (q3 and q1) are turned on and the ic is otherwise inactive. c3?c4 sw switching node . connect to inductor. d2?d4 pgnd power ground . this is the power return for the ic. the c out bypass capacitor should be returned with the shortest path possible to these pins.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 4 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v in vin input voltage -0.3 6.5 v v out v out output voltage 6.0 v sw node dc -0.3 8.0 v transient: 10 ns, 3 mhz -1.0 8.0 v other pins -0.3 6.5 (3) v esd electrostatic discharge protection level human body model per jesd22-a114 3.0 kv charged device model per jesd22-c101 1.5 kv t j junction temperature ?40 +150 c t stg storage temperature ?65 +150 c t l lead soldering temperature, 10 seconds +260 c note: 3. lesser of 6.5 v or v in + 0.3 v. recommended operating conditions the recommended operating conditions table defines the cond itions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the da tasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v in supply voltage 2.35 5.50 v i out output current 0 1500 ma t a ambient temperature ?40 +85 c t j junction temperature ?40 +125 c thermal properties junction-to-ambient thermal resistance is a function of application and board layout. this data is measured with four-layer fairchild evaluation boards (1 oz copper on all layers). spec ial attention must be paid not to exceed junction temperature t j(max) at a given ambient temperate t a . symbol parameter typical unit ? ja junction-to-ambient thermal resistance 80 c/w ? jb ? junction-to-board thermal resistance 42
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 5 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode electrical specifications recommended operating conditions, unless otherwise noted, circuit per figure 1, v in = 2.35 v to v out , t a = -40 ? c to 85 ? c. typical values are given v in = 3.0 v and t a = 25 ? c. symbol parameter conditions min. typ. max. unit i q v in quiescent current bypass mode v out =3.5 v, v in =4.2 v 140 190 ? a boost mode v out =3.5 v, v in =2.5 v 150 250 ? a shutdown: en=0, v in =3.0 v 1.5 5.0 ? a forced bypass mode v out =3.5 v, v in =3.5 v low i q 4 10 ? a ocp on 45 90 ? a i lk vout to vin reverse leakage v out =5 v, en=0 0.2 1.0 ? a i lk_out v out leakage current v out =0, en=0, v in =4.2 v 0.1 1.0 ? a v uvlo under-voltage lockout v in rising 2.20 2.35 v v uvlo_hys under-voltage lockout hysteresis 200 mv v pg(ol) pg low i pg =5 ma 0.4 v i pg_lk pg leakage current v pg =5 v 1 a v ih logic level high en, vsel, byp 1.2 v v il logic level low en, vsel, byp 0.4 v r low logic control pin pull downs (low active) byp, vsel, en 300 k ? i pd weak current source pull-do wn byp, vsel, en 100 na v reg output voltage accuracy referred to gnd, dc, v out -v in > 100 mv ?2 4 % v trsp load transient response 500 ? 1250 ma, v in =3.6 v, v out =5.0 v 4 % t on on-time v in =3.0 v, v out =3.5 v, load >1000 ma 80 ns f sw switching frequency v in =3.6 v, v out =5.0 v, load=1000 ma 2.0 2.5 3.0 mhz i v_lim boost valley current limit v in =2.6 v 2.6 2.9 3.1 a i v_lim_ss boost valley current limit during ss v in =2.6 v 1.6 a v min_1.5a minimum v in for 1500 ma load (short term) v out =5.0 v, t j < 120 ? c 3.0 v v out =4.5 v, t j < 120 ? c 2.8 v v out =3.5 v, t j < 120 ? c 2.35 v v out =3.15 v, t j < 120 ? c 2.35 v i ss_pk soft-start input peak current limit lin1 slow 350 ma fast 800 ma lin2 slow 700 ma fast 1600 ma t ss soft-start en high to regulation slow, 50 ? load 1300 ? s fast, 50 ? load 600 ? s v ocp ocp comparator threshold v in =5.0 v, v in -v out 200 mv v ovp output over-voltage protection threshold 6.0 6.3 v v ovp_hys output over-voltage protection hysteresis 300 mv continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 6 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode electrical specifications (continued) recommended operating conditions, unless otherwise noted, circuit per figure 1, v in = 2.35 v to v out , t a = -40 ? c to 85 ? c. typical values are given v in = 3.0 v and t a = 25 ? c. symbol parameter conditions min. typ. max. unit r ds(on)n n-channel boost switch r ds(on) v in =3.5 v, v out =3.5 v 85 120 m ? r ds(on)p p-channel sync rectifier r ds(on) v in =3.5 v, v out =3.5 v 65 85 m ? r ds(on)p_byp p-channel bypass switch r ds(on) v in =3.5 v, v out =3.5 v 65 85 m ? t 120a t120 activation threshold 120 c t 120r t120 release threshold 100 c t 150t t150 threshold 150 c t 150h t150 hysteresis 20 c t rst fault restart timer 20 ms
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 7 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode typical characteristics unless otherwise specified; v in = 3.6 v, and v out = 5 v, and t a = 25c; circuit and components according to figure 1. 80% 84% 88% 92% 96% 100% 0 250 500 750 1000 1250 1500 efficiency load current (ma) 2.5 vin 3.0 vin 3.3 vin 4.2 vin 80% 82% 84% 86% 88% 90% 92% 94% 96% 0 250 500 750 1000 1250 1500 efficiency load current (ma) -40c +25c +85c figure 5. efficiency vs. load current and input voltage, v out =3.5 v figure 6. efficiency vs. load current and temperature, v in =3.0v, v out =3.5 v 72% 76% 80% 84% 88% 92% 96% 0 250 500 750 1000 1250 1500 efficiency load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin 76% 80% 84% 88% 92% 96% 0 250 500 750 1000 1250 1500 efficiency load current (ma) -40c +25c +85c figure 7. efficiency vs. load current and input voltage f igure 8. efficiency vs. load current and temperature 80% 84% 88% 92% 96% 100% 2.0 2.5 3.0 3.5 4.0 4.5 efficiency input voltage (v) 5.0 vout 4.5 vout 3.5 vout 3.15 vout 76% 80% 84% 88% 92% 96% 100% 2.02.53.03.54.04.5 efficiency input voltage (v) 5.0 vout 4.5 vout 3.5 vout 3.15 vout figure 9. efficiency vs. input voltage and output voltage, 200 ma load figure 10. efficiency vs. input voltage and output voltage, 1000 ma load
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 8 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherwise specified; v in = 3.6 v, v out = 5 v, and t a = 25c; circuit and components according to figure 1. -2 -1 0 1 2 3 0 250 500 750 1000 1250 1500 output regulation (%) load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin -2 -1 0 1 2 3 0 250 500 750 1000 1250 1500 output regulation (%) load current (ma) - 40c +25c +85c figure 11. output regulation vs. load current and input voltage (normalized to 3.6 v in , 500 ma load ) figure 12. output regulation vs. load current and temperature (normalized to 3.6 v in , 500 ma load, t a =25c) 0 50 100 150 200 250 2.0 2.5 3.0 3.5 4.0 4.5 input current ( ? a) input voltage (v) -40c auto +25c auto +85c auto -40c bypass +25c bypass +85c bypass 0 50 100 150 200 250 2.0 2.5 3.0 3.5 4.0 4.5 input current ( ? a) input voltage (v) - 40c auto +25c auto +85c auto - 40c bypass +25c bypass +85c bypass figure 13. quiescent curr ent vs. input voltage, temperature and mode, v out =5.0 v, forced bypass, ocp active figure 14. quiescent curr ent vs. input voltage, temperature and mode, v out =3.5 v, forced bypass, low i q 0 10 20 30 40 50 60 0 250 500 750 1000 1250 1500 output ripple (mvpp) load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin 0 500 1,000 1,500 2,000 2,500 3,000 0 250 500 750 1000 1250 1500 switching frequency (khz) load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin figure 15. output ripple vs. load current and input voltage figure 16. frequency vs. load current and input voltage
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 9 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherwise specified, v in = 3.6 v; v out = 5 v, and t a = 25c; circuit and components according to figure 1. figure 17. startup, 50 ? load figure 18. startup, 50 ? load, v in =2.5 v, v out =3.5 v figure 19. overload protection figure 20. load transient, 100-500 ma, 100 ns edge figure 21. load transient, 500-1250 ma, 100 ns edge figure 22. load transient, 100-500 ma, 100 ns edge, v in =3 v, v out =3.5 v
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 10 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherwise specified, v in = 3.6 v, v out = 5 v, t a = 25c; circuit and components according to figure 1. figure 23. load transient, 500-1950 ma, 100 ns edge, v in =3 v, v out =3.5 v figure. 24 line transient, 3.0-3.6 v in , 10 s edge, 500 ma load, v out =3.15 v figure 25. line transient, 3.0-3.6 v in , 10 s edge, 1,000 ma load, v out =3.5 v figure 26. line transient, 3.3-3.9 v in , 10 s edge, 500 ma load, v out =3.5 v figure. 27 bypass entry / exit, slow v in ramp 1 ms edge, 500 ma load, v out =3.5 v, 3.2 - 3.8 v in figure 28. v sel step, v in =3 v, v out =3.5 v, 500 ma load
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 11 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode circuit description fan48630 is a synchronous boost regulator, typically operating at 2.5 mhz in continuous conduction mode (ccm), which occurs at moderate to heavy load current and low v in voltages. the regulator includes a bypass mode that activates when v in is above the boost regulator?s setpoint. in anticipation of a heavy load transition, the setpoint can be adjusted upward by fixed amounts with the vsel pin to reduce the required system headroom during lighter-load operation to save power. table 2. operating states mode description invoked when lin linear startup v in > v out ss boost soft-start v out < v out(min) bst boost operating mode v out = v out(min) bps true bypass mode v in > v out(min) boost mode the fan48630 uses a current-mode modulator to achieve excellent transient response and smooth transitions between ccm and discontinuous conduction mode (dcm) operation. during ccm operation, the device maintains a switching frequency of about 2.5 mhz. in light-load operation (dcm), frequency is reduced to maintain high efficiency. table 3. boost startup sequence start state entry exit end state timeout (s) lin1 v in > uvlo, en=1 v out > v in - 300 mv ss lin2 512 lin2 lin1 exit v out > v in - 300 mv ss timeout fault 1024 ss lin1 or lin2 exit v out =v out(min) bst overload timeout fault 64 shutdown and startup if en is low, all bias circuits are off and the regulator is in shutdown mode. during shutdown, current flow is prevented from v in to v out , as well as reverse flow from v out to v in . during startup, it is recommended to keep dc current draw below 500 ma. lin state when en is high and v in > uvlo, the regula tor attempts to bring v out within 300 mv of v in using the internal fixed current source from v in (q3). the current is limi ted to lin1 set point. if v out reaches v in -300 mv during lin1 mode, the ss state is initiated. otherwise, lin1 times out after 512 ? s and lin2 mode is entered. in lin2 mode, the cu rrent source is incr emented to 2a. if v out fails to reach v in -300 mv after 1024 ? s, a fault condition is declared. ss state upon the successful completion of the lin state (v out > v in - 300 mv), the regulator begins switching with boost pulses current limited to 50% of nominal level. during ss state, v out is ramped up by stepping the internal reference. if v out fails to reach regulation during the ss ramp sequence for more than 64 s, a fault condition is declared. if large c out is used, the reference is automatically stepped slower to avoid excessive input current draw. bst state this is a normal operating state of the regulator. bps state if v in is above v reg when the ss mode successfully completes, the device transitions directly to bps mode. fast and slow soft-start options fan48630uc315x, fan48630uc33x, FAN48630UC35X, and fan48630uc37ax feature fast startup with en to regulation time of 500 s. lin1 and lin2 phase currents are doubled compared to slow options, ss phase is also faster. fan48630uc45x and fan48630uc50xs feature low startup with en to regulation time of 1300 ? s to reduce inrush current. fault state the regulator enters the fault state under any of the following conditions: ? v out fails to achieve the voltage required to advance from lin state to ss state. ? v out fails to achieve the voltage required to advance from ss state to bst state. ? boost current limit triggers for 2 ms during the bst state. ? v ds protection threshold is exceeded during bps state. once a fault is triggered, the regulator stops switching and presents a high-impedance path between v in and v out . after waiting 20 ms, a restart is attempted. power good power good is 0 fault, 1 po wer good, open-drain input. the power good pin is provided for signaling the system when the regulator has successfully completed soft-start and no faults have occurred. power good also functions as an early warning flag for high die temperature and overload conditions. ? pg is released high when the soft-start sequence is successfully completed. ? pg is pulled low when pmos current limit has triggered for 64 s or the die the temperature exceeds 120c. pg is re-asserted when the device cools below to 100c. ? any fault condition causes pg to be de-asserted.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 12 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode over-temperature the regulator shuts down when the die temperature exceeds 150c. restart occurs when the ic has cooled by approximately 20c. bypass operation in normal operation, the device automatically transitions from boost mode to bypass mode, if v in goes above target v out . in bypass mode, the device fully enhances both q1 and q3 to provide a very low impedance path from vin to vout. entry to the bypass mode is triggered by condition where v in > v out and no switching has occurred during past 5 s. to soften the entry to bypass mode, q3 is driven as a linear current source for the first 5 s. bypass mode exit is triggered when v out reaches the target v out voltage. during automatic bypass mode, the device is short-circuit protected by voltage comparator tracking the voltage drop from v in to v out ; if the drop exceeds 200 mv, fault is declared. forced bypass entry to forced bypass mode initiates with a current limit on q3 and then proceeds to a true bypass state. to prevent reverse current to the battery, the device waits until output discharges below v in before entering forced bypass mode. low-iq forced bypass mode is available for fan48630uc315x, fan48630uc33x, FAN48630UC35X, and fan48630uc37ax. after the transition is complete, most of the internal circuitry is disabled to minimize quiescent current draw. short- circuit, uvlo, output ovp and over- temperature protections are inactive in forced bypass mode. ocp in forced bypass mode is available for fan48630uc45x and fan48630uc50x. during forced bypass mode, the device is short-circuit protected by a voltage comparator tracking the voltage drop from vin to vout. if the drop exceeds 200 mv, a fault is declared. the over-temperature protection is also active. in forced bypass mode, v out can follow v in below v out(min) . vsel v sel can be asserted in anticipation of a positive load transient. raising v sel increases v out(min) by a fixed amount and v out is stepped to the corresponding target output voltage in 20 s. the functionality can also be utilized to mitigate undershoot during severe line transients, while minimizing v out during more benign operating conditions to save power.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 13 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode application information output capacitance (c out ) stability the effective capacitance (c eff ) of small, high-value, ceramic capacitors decreases as bias voltage increases. fan48630 is guaranteed for stable operation with the minimum value of c eff (c eff(min) ) outlined in table 4 below. table 4. minimum c eff required for stability operating conditions c eff(min) ( ? f) v out (v) i load (ma) 3.15 0 to 1500 12 3.5 0 to 1500 9 4.5 and 5 0 to 1500 6 c eff varies with manufacturer, material, and case size. inductor selection recommended nominal inductance value is 0.47 ? h. fan48630 employs valley-current limiting; peak inductor current can reach 3.8 a for a short duration during overload conditions. saturation effects cause the inductor current ripple to become higher under high loading as only valley of the inductor current ripple is controlled. for fan48630uc315x and fan48630uc33x, a 0.33 ? h inductor can be used for improved transient performance. startup input current limiting is in effe ct during soft-start, which limits the current available to charge c out and any additional capacitance on the v out line. if the output fails to achieve regulation within the limits described in the startup section, a fault occurs, causing the circuit to shut down then restart after a significant time period. if the total combined output capacitance is very high, the ci rcuit may not start on the first attempt, but eventually achieves regulation if no load is present. if a high-current load and high capacitance are both present during soft-start, the circuit may fail to achieve regulation and continually attempts soft-start, only to have the output capacitance discharged by the load when in a fault state. output voltage ripple output voltage ripple is inversely proportional to c out . during t on , when the boost switch is on, all load current is supplied by c out . output ripple is calculated as: out ) ( c i t v load on p p ripple ? ? ? and eq. 1 ? ? ? ? ? ? ? ? ? ? ? ? ? out in sw sw on v v t d t t 1 therefore: eq. 2 out ) ( 1 c i v v t v load out in sw p p ripple ? ? ? ? ? ? ? ? ? ? ? ? ? and eq. 3 sw sw f t 1 ? eq. 4 as can be seen from eq. 3, the maximum v ripple occurs when v in is minimum and i load is maximum. layout recommendations the layout recommendations below highlight various top- copper pours using different colors. to minimize spikes at v out , c out must be placed as close as possible to pgnd and vout, as shown in figure 29. for thermal reasons, it is suggested to maximize the pour area for all planes other than sw. especially the ground pour should be set to fill all available pcb surface area and tied to internal layers with a cluster of thermal vias. vin sw gnd vout figure 29. layout recommendation
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 14 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode physical dimensions bottom view side views top view recommended land pattern ball a1 index area 1 2 3 4 a b c d seating plane 16x a1 0.005 cab f (nsmd pad type) ?0.2600.02 0.40 0.40 (x) 0.018 (y) 0.018 0.625 0.547 0.06 c 0.05 c e d f 0.3780.018 0.2080.021 notes: a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerance per asme y14.5m, 1994. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 586 microns 39 microns (547-625 microns). f. for dimensions d, e, x, and y see product datasheet. g. drawing filnam e: mkt-uc016aarev2. 0.03 c 2x 0.03 c 2x e d b c a 0.40 0.40 (?0.20) cu pad (?0.30) solder mask opening figure 30. 16-ball, 4x4 array, 0.4 mm pitch, 250 m ball, wafer-level chip-scale package (wlcsp) product-specific dimensions product d e x y fan48630ucx 1.780 0.030 1.780 0.030 0.290 0.290 package drawings are provided as a service to customers considering fairchild component s. drawings may change in any manner wit hout notice. please note the revision and/or date on the drawing and contact a fairchild semi conductor representative to verify or o btain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan48630 ? rev. 1.0.1 15 fan48630 ? 2.5mhz, 1500ma synchronous tinyboost ? regulator with bypass mode

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